1. Field of the Invention
Embodiments of the present invention generally relate to an apparatus and a method for processing semiconductor substrates. Particularly, embodiments of the present invention relates to apparatus and methods for forming shallow trench isolations having recesses with rounded bottoms.
2. Description of the Related Art
As critical dimension of semiconductor devices decreases, distances between neighboring devices formed on a semiconductor substrate are also shortened. As a result, crosstalk among signals for neighboring devices also increases.
FIG. 1 is a simplified schematic figure of a memory device 100 formed on a silicon substrate 101. Generally, active areas 108 for individual memory cells are separated by shallow trench isolations (STI) 104. The active areas 108 are generally doped areas in the silicon substrate 101 and the shallow trench isolations 104 are generally silicon oxide filled in a lower portion of trench structures 112 formed in the substrate 101. Floating gates 103 are formed above the active areas 108 with an insulative layer 102 formed therebetween. Control gates 105 are formed from an upper portion of the trench structures 112. The floating gates 103 and the control gates 105 usually comprise polycrystalline silicon. Insulative layers 107, 110 are generally formed within and above the trench structures 112.
In the state of the art memory device, as shown in the memory device 100 of FIG. 1, crosstalk is problematic, particularly crosstalk near area 106 between the control gates 105 and the active areas 108.
One solution to reduce crosstalk between control gates and active areas within a memory device is to increase distance between the control gates and the active areas by forming recessed shallow trench isolation structures. However, the state of the art methods for forming recessed shallow trench isolation structures are very complicated involving a number of added process steps and requiring additional production equipment.
FIGS. 2A-2F schematically illustrate one state of the art sequence for forming recessed shallow trench isolation structures.
FIG. 2A schematically illustrates a substrate section 200. A polycrystalline silicon layer 202 is deposited on a silicon substrate 201. A trench 203 is formed through the polycrystalline silicon layer 202 and into the silicon substrate 201. The silicon oxide 204 is then filled in the trench 203. A planarization process is usually followed to expose the polycrystalline silicon layer 202 after filling the trench 203 with the silicon oxide 204.
FIG. 2B schematically illustrates a result structure after an etching process that removes a portion of the silicon oxide 204 in the trench 203 and forms a recess 205.
A silicon nitride layer 206 is then deposited over the recess 205 and the polycrystalline silicon layer 202 as shown in FIG. 2C.
An anisotropic nitride etching process is then performed to remove the silicon nitride layer 206 from over a bottom 207 of the recess 205 and over the polycrystalline layer 202 leaving only vertical sections of the nitride layer 206 to protect sidewalls of the recess 205, as shown in FIG. 2D. A silicon oxide etching process is followed to remove silicon oxide 204 from the bottom 207 of the recess 205, as shown in FIG. 2D.
A nitride etching process is then need to remove the silicon nitride layer 206 from the sidewalls of the recess 205. A step 208 is then formed in the recess 205, as shown in FIG. 2E.
In FIG. 2F, a recessed shallow trench isolation that would reduce cross talk may be formed over the step 208.
The sequence shown in FIGS. 2A-2F requires four extra processes, silicon nitride deposition, anisotropic nitride etching, silicon oxide etching, and nitride etching, to form a recessed shallow trench isolation (shown in FIG. 2F) that would reduce crosstalk in the final device produced. The four extra processes require additional processing chambers and additional processing chemistry to the over all sequence of forming shallow trench isolation. As a result, the cost of ownership is greatly increased.
Therefore, there is a need for methods and apparatus for efficiently forming recessed shallow trench isolation structures to reduce crosstalk among devices formed in a semiconductor substrate.